Corporate Office:
WhizChip Design Technologies Pvt. Ltd.
2nd and 3rd floor, Lingaraju Complex
Gandhi Bazaar Main Road
Gandhi Bazaar
Bangalore – 560 004
India

Ph: +91 -80 -4061 7777
Fax: +91 -80 -4061 7787
Email: sales@whizchip.com
URL: www.whizchip.com

Europe Branch
WhizChip Design Technologies Pvt Ltd Represented by: 3MM
Portes de l'Arenas - Hall C
455, Promenade des Anglais
06299 NICE Cedex 3
France
Tel: +33 680 345 892
Fax: +33 483 331 338
Email: emea-sales@whizchip.com

Executive Management:    
Ravi Shankar R
CEO
Raghavendra Mohan V
VP Customer Relationship
Vikas Kumar Soni
VP Engineering

Functional teams :

 

Year of incorporation: 2005

Domains :

Chipsets, Audio, Security & Networking Processors, Media Processors, RF, Medical Imaging, DTV Chip, WiMax, VoIP, Networking & Communication, Wireless Modems, ARM/MIPS SoCs…….

SI .no Domain   Work Done
1 Chipset RTL, Block Verification, Full Chip Verification, Gate sims, DFT Sims, Emulation, Silicon bring-up
2 Audio MRD to D&V to Silicon Validation, turn-key using back-end partner
3 Security & Networking Block and full chip verification, coverage closure, Gate sims and sign-off
4 RF Processing Block & full chip verification, coverage closure
5 Medical Video Architecture, RTL, Verification, FPGA fitting, sign-off
6 Media Processor RTL, Verification and sign-off
7 Networking & Communication Block & full chip verification, coverage closure
8 DTV Chip SoC testbench architecture and implementation
9 WiMax SoC C based verification
10 VOIP SoC Architecture, RTL, IP Qualification, timing closure
11 Wireless Modem Coverage Closure
       

Target Market :

Technology companies looking for outsourcing/help in –
  • Design & Verification of
    • ASIC
    • SoC
    • FPGAs
  • Emulation/FPGA Validation/Prototyping
  • Silicon Validation

  
Expertise :

Design
  • Architecture & Specification
  • Micro Architecture
  • RTL Coding

Verification

  • Test Bench Architecture & SpecificationPlanning
  • Test Bench Development
  • Coverage driven random testing
  • Gate Level Verification with/without SDF
  • DFT Verification

Implementation

  • Constraints for Synthesis and STA
  • Synthesis
  • STA
  • DFT
  • Physical Design
  • Timing Closure

Emulation/Prototyping

  • FPGA implementation
  • Software Hardware co-simulation
  • QA

Post-Silicon

  • Board Design, Fabrication, Assembly & Testing
  • Silicon Bring-up
  • QA
  • Customer support infrastructure